Method and circuit arrangement for offset correction in a...

Details Method and circuit arrangement for offset correction in a... Method and circuit arrangement for offset correction in a...

H - Electricity

03

G

H03G 1/00 (2006.01) H03D 3/00 (2006.01) H03F 1/30 (2006.01) H04B 1/30 (2006.01) H04L 25/06 (2006.01)

Patent

CA 2087231

- 10 - Abstract Method and Circuit Arrangement for Offset Correction in a TDMA Radio Receiver The levels of received TDMA signals may vary widely from section to section. In DC-coupled amplifier circuits, the received signals are distorted by offset voltages. Conventional correcting or balancing methods use control mechanisms which do not allow for level variations or offset drift and tend to result in miscompensation of individual signal sections. Other methods depend on time intervals defined in the received signal and having a known average value. It is the object of the invention to provide a correct- ing method and a circuit arrangement for carrying out the same which achieve a self-adjusting, not widely varying (floating) correction value, thus avoiding mis- compensation. This is accomplished by selecting the individual time slots in a comparator with the aid of limit value. (Fig. 2)

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