Method and circuit for aligning data flows in time division...

H - Electricity – 04 – J

Patent

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H04J 3/02 (2006.01) H03L 7/081 (2006.01) H04J 3/06 (2006.01) H04L 7/033 (2006.01) H04L 7/04 (2006.01) H04L 12/26 (2006.01)

Patent

CA 2351778

Method for aligning data flows in time division frames, providing for measuring the phase of said input data flow with respect to the phase of a reference signal, for controlling, depending on the measured phase, the delay time introduced by a delay line in said input data flow. According to the invention, it is provided to measure the phase of the input data flow in a time interval substantially corresponding to the transit time of a sure data sequence containing a logic transition, said sure data sequence being comprised in said input data flow.

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