Method and circuit for suppressing sequential "zeroes" data

Details Method and circuit for suppressing sequential "zeroes" data Method and circuit for suppressing sequential "zeroes" data

H - Electricity

03

M

354/67

H03M 5/14 (2006.01) G11B 20/14 (2006.01) H04L 25/49 (2006.01)

Patent

CA 1253967

METHOD AND CIRCUIT FOR SUPPRESSING SEQUENTIAL "ZEROES" DATA ABSTRACT OF THE DISCLOSURE A method for suppressing sequential "zeroes" data and a circuit for the same, comprising, a transmitting portion and a receiving portion, and steps for detecting whether zeroes data is sequenced in a frame, inserting the datum "1" after the sequential zeroes data in the case of detecting said sequential zeroes data, sending the frame having said datum "1" inserted per said sequential zeroes data to the receiving portion and adding the portion of said frame forced out by said insertion of the datum "1" to the top portion of the next frame to said frame so as to use said forced out portion for detecting in said first step, the latter steps of detecting whether said datum "1" is inserted per said sequential zeroes data in the frame received, and deleting said datum "1" from said received frame.

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