Method and circuitry arrangement for refreshing data stored...

Details Method and circuitry arrangement for refreshing data stored... Method and circuitry arrangement for refreshing data stored...

G - Physics

11

C

352/40

G11C 11/34 (2006.01) G11C 11/406 (2006.01)

Patent

CA 1171526

ABSTRACT OF THE DISCLOSURE The invention concerns a method and circuitry for refreshing data stored in a dynamic MOS memory. The refresh- ing process proceed independently of data handling in the memory. The duration between successive two refreshing pro- cesses is selected such that is is smaller than a predeter- mined maximum duration by a duration which is associated with a memory process. When during a refreshing process, a reading process is to be executed, the reading process is delayed by means of inserted holding cycles. During execu- tion of memory processes, the execution of a refreshing process is delayed until the memory process is concluded. In the case of a simultaneous appearance of signals which precede a refreshing process and a memory process, a decision unit determines a sequence of execution of the processes.

372932

Affiliated with

Also associated with

Rating

Method and circuitry arrangement for refreshing data stored... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and circuitry arrangement for refreshing data stored..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and circuitry arrangement for refreshing data stored... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1206724