Method and system for controlling statistically multiplexed...

H - Electricity – 04 – L

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Details

H04L 12/56 (2006.01) H04L 12/403 (2006.01) H04Q 11/04 (2006.01)

Patent

CA 2181333

The invention relates to a method and system for controlling a statistically multiplexed ATM bus (1), to the bus being connected a bus controller (6) and interface units (21-2N) for transmission of packets, i.e. cells, over the bus. Having detected, for each cell to be transmitted to an ATM bus, the address of the interface unit participating in the transmission, the bus controller (6) sets the address on an address bus (1a) of the ATM bus (1), thereby activating transmission of the cell from the bus controller to the interface unit or vice versa over a data bus (1d) of the ATM bus. During the transmission of the cell, the bus controller (6) fetches the next interface unit address for transmission of the next cell from or to the interface unit concerned.

Cette invention se rapporte à un procédé et à un système pour commander un bus MTA (mode de transfert asynchrone) à multiplexage statistique (1), bus auquel sont connectés un contrôleur de bus (6) et des unités d'interface (2¿1?-2¿N?) pour la transmission de paquets, c'est-à-dire de cellules, le long du bus. Après avoir détecté, pour chaque cellule à transmettre vers le bus MTA, l'adresse de l'unité d'interface qui participe à la transmission, le contrôleur de bus (6) sélectionne l'adresse sur un bus d'adresses (1a) du bus MTA (1), activant ainsi la transmission de la cellule du contrôleur de bus à l'unité d'interface ou vice versa, le long d'un bus de données (1d) du bus MTA. Pendant la transmission de la cellule, le contrôleur de bus (6) recherche l'adresse de l'unité d'interface suivante pour la transmission de la cellule suivante à partir ou à destination de l'unité d'interface concernée.

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