Method and system for implementing a circuit design in a...

G - Physics – 06 – F

Patent

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G06F 17/50 (2006.01) H01L 21/82 (2006.01)

Patent

CA 2661715

Provided is a system for generating configuration data for mounting a circuit design on a segmented reconfigurable device. An arrangement/wiring support system (30) includes a database (31) for storing hardware information (89) containing PEs data contained in each of the segments and first-level and second-level routing matrix data; and a device (33) for mapping the circuit design on the PEs. The mapping device (33) maps the circuit design on the PEs by executing repetition algorithm for minimizing the cost function according to the hardware information (89). The cost function contains an item for minimizing the use of the second-level routing matrix (22) for making a connection between the segments.

L'invention concerne un système permettant de générer des données de configuration de manière à monter un modèle de circuit sur un dispositif reconfigurable segmenté. Un agencement/système de support de câblage (30) comprend une base de données (31) destinée à enregistrer des informations de matériel (89) contenant des données d'éléments de traitement (PE) contenues dans chacun des segments et des données de matrice de routage de premier et de second niveaux, et un dispositif (33) destiné à faire correspondre le modèle du circuit aux éléments de traitement. Ce dispositif de correspondance (33) fait correspondre le modèle de circuit aux éléments de traitement par exécution d'un algorithme de répétition afin de minimiser la fonction coût, suivant les informations de matériel (89). La fonction coût comporte un article pour la minimisation de l'utilisation de la matrice de routage de second niveau (22) afin d'établir une connexion entre les segments.

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