Method for arranging a read memory for reading out updating...

G - Physics – 11 – C

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G11C 11/34 (2006.01) G11C 5/00 (2006.01) G11C 7/00 (2006.01) G11C 29/44 (2006.01) H01L 27/112 (2006.01)

Patent

CA 1327647

ABSTRACT OF THE DISCLOSURE A method is disclosed for arranging a read memory for reading electrically update status information from an integrated circuit which comprises various circuit layers. Patterned circuit layers, so-called pattern layers, are produced, for instance, from a respective mask which has been made for each of the pattern layers. Each pattern layer in which reconstruction can be made has provided therein a separate memory device such that when chances are made in one such pattern layer, the updating status of the pattern layer can be written into the memory device in code form. The memory devices included in an integrated circuit form a read-only- memory which is programmed so that the pattern layers in which a memory device is provided contain a code which is unique to its own update status. At the same time as the updating status code is written into the memory device, the code is also written into a test device as reference information. When checking the circuit, a test program in the test device reads the update status of the pattern layers and compares it with the reference information, the result of this comparison indicating the update status of the integrated circuit.

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