B - Operations – Transporting – 41 – J
Patent
B - Operations, Transporting
41
J
B41J 2/44 (2006.01) B41J 2/45 (2006.01) B41J 2/455 (2006.01) H01L 25/04 (2006.01) H01L 25/18 (2006.01) H01L 27/15 (2006.01) H01L 33/00 (2006.01)
Patent
CA 2351462
A method for arranging light emitting device array chips in which defective chips can be removed completely. A plurality of rectangular self-scanning light-emitting device array chips each comprising an array of light-emitting device so arranged linearly to face one end, and a plurality of bonding pads provided at the other end are staggered on a substrate. The first end of the chips are arranged such that the light emitting devices are arranged at regular pitches and do not overlap with each other in the direction orthogonal to the direction of arrangement of the chips, and the other ends of the chips are arranged such that the light-emitting devices are arranged at regular pitches and overlap with each other in the direction orthogonal to the direction of arrangement of the chips.
Cette invention concerne une technique d'agencement de dispositifs à dispositifs luminescents qui permet la dépose complète de puces défectueuses. Une pluralité de puces à dispositifs luminescents à auto-balayage, rectangulaires, comprend un ensemble de dispositifs luminescents tournés linéairement vers une extrémité. Sur l'autre extrémité, une pluralité de plots de connexion est disposée en quinconce sur un substrat. Les premières extrémités des puces sont telles que les dispositifs luminescents sont implantés à intervalles réguliers sans se chevaucher dans le sens perpendiculaire au sens de montage des puces. Les secondes extrémités des puces sont disposées de telle sorte que les dispositifs luminescents sont implantés à intervalles réguliers et se chevauchent dans le sens perpendiculaire au sens de montage des puces.
Nippon Sheet Glass Co. Ltd.
Smart & Biggar
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