Method for conditioning semiconductor-on-insulator...

H - Electricity – 03 – K

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H03K 19/177 (2006.01)

Patent

CA 2431432

Method preconditioning and in-use conditioning of transistors formed on a semiconductor-on-insulator structue is described. More particularly, transistors of a programmable logic device (PLD), such as a field programmable gate array (FPGA), are preconditioned to take advantage of charge accumulation owing to a "floating body" effect. This preconditioning takes a form of switching transistors on and off prior to customer operation. Accordingly, semiconductor-on-insulator transistors accumulate charge during this switching period, so when customer operation takes place, transistor switching times are less variable over a period of operation of the PLD. Additionally, a design process and implementation is described for identification and in-use conditioning of transistors that may need conditioning during customer operation to control switching time variability.

L'invention porte sur un procédé et un appareil de pré-conditionnement et de conditionnement pendant l'utilisation de transistors SOI (semi-conducteur sur isolant) et plus particulièrement de transistors pour dispositif logiques programmables (PLD) tels que des (FPGA) qui sont pré-conditionnés pour bénéficier de l'accumulation de charges due à l'effet de "corps flottant". Le pré-conditionnement consiste à commuter les transistors sur ON et OFF avant que le client ne les utilise. Les transistors SOI accumulent des charges pendant cette période de commutation, ainsi lors de leur utilisation par le client, les temps de commutation sont moins variables, pendant le fonctionnement du PLD. L'invention porte en outre sur un processus de conception et de mise en oeuvre servant à l'identification et au conditionnement des transistors effectué par le client afin d'agir sur la variabilité du temps de commutation.

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