Method for fabricating multilayer circuits

Details Method for fabricating multilayer circuits Method for fabricating multilayer circuits

H - Electricity

05

K

356/16

H05K 3/00 (2006.01) H05K 3/46 (2006.01) H05K 1/03 (2006.01) H05K 1/09 (2006.01)

Patent

CA 2030151

-15- EL-0285 ABSTRACT A method for fabricating multilayer circuits comprising patterned conductive layers separated by dielectric layers and connected by vias in the dielectric, wherein the unfired dielectric layers are laminated as gapes or sheets over either a fired or unfired conductor layer while under a vacuum. -15-

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