Method for fabricating semiconductor devices

Details Method for fabricating semiconductor devices Method for fabricating semiconductor devices

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H01L 21/38 (2006.01) H01L 21/033 (2006.01) H01L 21/225 (2006.01) H01L 21/762 (2006.01) H01L 21/763 (2006.01) H01L 21/8238 (2006.01) H01L 27/092 (2006.01)

Patent

CA 1232979

- 25 - Abstract A new method for fabricating semiconductor devices, especially CMOS devices, as well as the resulting devices, is disclosed. The method involves incorporating dopants into a semiconductor substrate (e.g. 10) through a region (e.g. 50) of the substrate surface (e.g. 20), and diffusing the implanted dopants into the substrate to form a tub. Prior to the diffusion step, a trench (e.g. 80) is formed in, and extending beneath, the surface which partially or completely encircles the region. The trench serves to prevent the formation, or reduce the size, of a relatively low dopant concentration region, which would otherwise lead to undesirable leakage currents in the completed CMOS device, and prevents latchup. Fig. 12.

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