Method for forming an isolation region for electrically...

Details Method for forming an isolation region for electrically... Method for forming an isolation region for electrically...

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H01L 21/32 (2006.01) B44C 1/22 (2006.01) C03C 15/00 (2006.01) H01L 21/033 (2006.01) H01L 21/308 (2006.01) H01L 21/762 (2006.01) H01L 21/763 (2006.01)

Patent

CA 1204525

METHOD FOR FORMING AN ISOLATION REGION FOR ELECTRICALLY ISOLATING ELEMENTS ABSTRACT OF THE DISCLOSURE A method for forming an isolation region having a submicron width thereof in a semiconductor substrate comprising the steps of: forming a metal or a metal silicide layer on the semiconductor substrate; then forming a resist layer on the metal or metal silicide layer; patterning the resist layer; selectively etching the metal or metal silicide layer and the semiconductor substrate by the reactive ion etching process using a mixture of chlorine-containing gas and oxygen gas to form a groove in the surface portion of the semiconductor substrate located around the edge of the resist layer; and forming an insulating layer in the groove.

440422

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