Method for interleaving a bit flow in a mobile telephone system

H - Electricity – 03 – M

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H03M 13/27 (2006.01) H04Q 7/30 (2006.01) H04L 1/00 (2006.01)

Patent

CA 2394547

Method for interleaving a bit flow in a mobile telephone system, said flow being subdivided into bit blocks, in their turn diagonally subdivided into bit sub-blocks according to the formula i(B,j) = c(n,k), in which k = 0,1,...,Bs - 1; n = 0,1,...,N,N+1,...; B = B0 +(M/2)*n+(k mod M);j = 2*(X mod (Bs/M))+((k mod M) div (M/2)); c(n,k) is the n-th block of the bit flow in input to the interleaving unit i(B,j) is the B-th sub-block of interlaced bits, B0 is the first sub-block containing the bits coming from the first block of said bit flow, M is an even positive number and Bs is a positive number divisible by M, in which the distance among the bits inside a sub-block is controlled through the variation of a first parameter .alpha., the shift in the insertion of bits between adjacent sub-blocks is controlled through a second parameter .beta., and X is an expression correlating said parameters .alpha. and .beta. according to the formula X=(.alpha.*(k div M)-.beta.*(k mod M)), in which (.alpha.*nl*M)/Bs ~ Z, for nl=0,1,...,(Bs/M)-1.

L'invention concerne un procédé d'entrelacement d'un flux binaire dans un système téléphonique mobile, ce flux étant subdivisé en blocs binaires, lesquels sont à leur tour subdivisés, en diagonale, en sous-blocs binaires, selon la formule i(B,j) = c(n,k), dans laquelle k = 0,1,...,Bs -1; n = 0,1,...,N,N+1,...; B = B¿0? +(M/2)*n+(k mod M);j = 2*(X mod (Bs/M))+((k mod M) div (M/2)), c(n,k) représente le n-nième bloc du flux binaire entrant dans l'unité d'entrelacement, i(B,j) représente le B-nième sous-bloc de bits entrelacés, B¿0? représente le premier sous-bloc contenant les bits provenant du premier bloc dudit flux binaire, M représente un nombre pair positif et Bs un nombre positif divisible par M, la distance entre les bits à l'intérieur d'un sous-bloc étant commandée par l'intermédiaire de la variation d'un premier paramètre .alpha., et le décalage dans l'insertion de bits entre sous-blocs adjacents étant commandé par l'intermédiaire d'un second paramètre .beta., et X représente une expression de corrélation des paramètres .alpha. et .beta. selon la formule X=(.alpha.*(k div M)-.beta.*(k mod M)), dans laquelle (.alpha.*nl*M)/Bs ~ Z, pour nl=0,1,...,(Bs/M)-1.

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