H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/134, 356/80
H01L 21/70 (2006.01) H01L 23/52 (2006.01) H01L 27/118 (2006.01) H01L 29/08 (2006.01)
Patent
CA 1141869
ABSTRACT A method for manufacturing semiconductor device by the master slice method, in which various kinds of semi- conductor devices are manufactured through utilization of a common master pattern and a plurality of kinds of wiring patterns. A number of bipolar transistor portions, each having a plurality of the same emitter regions are formed by the common master pattern in a semiconductor substrate and the plurality of emitter regions in the bipolar transistor portions are selectively used by the wiring patterns to form bipolar transistors of different DC characteristics. When manufacturing many kinds of semiconductor devices by this method, the area which would be wasted on the semiconductor substrate is greatly reduced, thus providing for enhanced area efficiency.
364711
Enomoto Hiromu
Imaizumi Taketo
Mitono Yoshiharu
Ohmichi Hitoshi
Yasuda Yasushi
Fetherstonhaugh & Co.
Fujitsu Limited
LandOfFree
Method for manufacturing a semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for manufacturing a semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing a semiconductor device will most certainly appreciate the feedback.
Profile ID: LFCA-PAI-O-562075