Method for manufacturing a semiconductor structure having...

Details Method for manufacturing a semiconductor structure having... Method for manufacturing a semiconductor structure having...

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H01L 21/31 (2006.01) H01L 21/265 (2006.01) H01L 21/74 (2006.01) H01L 21/76 (2006.01) H01L 21/762 (2006.01)

Patent

CA 1183966

METHOD FOR MANUFACTURING A SEMICONDUCTOR STRUCTURE HAVING REDUCED LATERAL SPACING BETWEEN BURIED REGIONS By Robert E. Caldwell ABSTRACT OF THE DISCLOSURE The lateral spacing between buried regions separated by oxide-isolation regions in a semiconductor structure is reduced to as little as one micron by performing a deep implantation of ions of the conductivity type opposite to that of the buried regions generally into portions of the substrate below the sites where the oxide-isolation regions are formed.

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