B - Operations – Transporting – 41 – J
Patent
B - Operations, Transporting
41
J
356/139
B41J 2/355 (2006.01)
Patent
CA 1205575
- 1 - Abstract: A method for manufacturing an integrated circuit thermal print head is illustrated including transistor 20 and a resistor doped region 22 formed on a first surface of a silicon circuit wafer 10. A contamination barrier in the form of a moat 26 filled with silicon nitride 30 is formed around the transistor 20. A support wafer 50 is secured to the first surface of the circuit wafer 10 by an adhesive layer 58. The circuit wafer 10 is thinned, and the exposed surface of the circuit wafer 10 is photoshaped to define wafer segments 68 positioned over the resistor doped region 22.
456899
Christian Raymond R.
Sue Harry
Zuercher Joseph C.
Kirby Eades Gale Baker
Teletype Corporation
LandOfFree
Method for manufacturing an integrated circuit device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for manufacturing an integrated circuit device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing an integrated circuit device will most certainly appreciate the feedback.
Profile ID: LFCA-PAI-O-1243490