Method for minimising atm cell memories

Details Method for minimising atm cell memories Method for minimising atm cell memories

H - Electricity

04

Q

H04Q 11/04 (2006.01) H04J 3/06 (2006.01) H04J 3/16 (2006.01) H04L 12/56 (2006.01)

Patent

CA 2385019

According to prior art, ATM cells representing STM-1 data streams are converted into STM-4 signals via the utopia level 2 and in the non concatenated mode for the STM-4 interface for instance. 4 ATM cell memories are needed for each channel by virtue of the requirements of the interface. The aim of the invention is to reduce said number. ATM cells are taken from the ATM cell memories at staggered intervals. The number of the ATM cell memories can thus be divided in half without restrictions in the transmission process.

Dans l'état de la technique, en mode sans concaténation, par exemple pour l'interface STM-4, des cellules ATM sont, en tant que flux de données SM-1, converties en signaux STM-4, par l'intermédiaire de l'interface de niveau d'utopie 2. A cet effet, quatre mémoires de cellules ATM sont nécessaires pour chaque canal, en raison des exigences de cette interface. Pour que ce nombre puisse être réduit, les cellules ATM sont, avec un décalage temporel, retirées des mémoires de cellules ATM. On peut ainsi diminuer de moitié le nombre des cellules de mémoires ATM, cela sans que l'on ait à subir des limitations dans le processus de transmission.

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