H - Electricity – 01 – L
Patent
H - Electricity
01
L
H01L 21/20 (2006.01) H01L 21/306 (2006.01) H01L 21/762 (2006.01) H01L 29/04 (2006.01) H01L 31/18 (2006.01)
Patent
CA 2075020
A method for preparing a semiconductor member comprising steps of: making a silicon substrate porous; forming a non-porous silicon monocrystalline layer on the porous silicon substrate at a first temperature; bonding a surface of the non-porous silicon monocrystalline layer on to another substrate having an insulating material on the surface thereof; etching the porous silicon by removing the porous silicon of the bonded substrate by chemical etching; and forming a monocrystalline silicon layer on the non-porous silicon monocrystalline layer by epitaxial growth at a second temperature higher than the first temperature.
Une méthode de préparation d'un élément semi-conducteur comprenant les étapes suivantes : rendre poreux un substrat de silicium; former, à une première température, une couche monocristalline de silicium non poreux sur le substrat de silicium poreux; faire coller une surface de la couche monocristalline de silicium non poreux sur un autre substrat dont la surface comprend un matériau isolant; attaquer le silicium poreux en l'enlevant du substrat collé au moyen d'une attaque chimique; et former par croissance épitaxiale, à une seconde température plus élevée que la première, une couche monocristalline de silicium sur la couche monocristalline de silicium non poreux.
Ichikawa Takeshi
Sakaguchi Kiyofumi
Yonehara Takao
Canon Kabushiki Kaisha
Ridout & Maybee Llp
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