H - Electricity – 01 – L
Patent
H - Electricity
01
L
H01L 21/20 (2006.01) H01L 21/302 (2006.01) H01L 21/306 (2006.01) H01L 21/31 (2006.01) H01L 21/762 (2006.01) H01L 27/04 (2006.01)
Patent
CA 2069038
A method for preparing a semiconductor member comprises process of making a porous Si substrate and then forming a non-porous Si monocrystalline layer on the porous Si substrate; primary bonding process of bonding the porous Si substrate and an insulating substrate via the non-porous Si monocrystalline layer; etching process of etching the porous Si to remove the porous Si by chemical etching after the primary bonding process; and secondary bonding process of strengthening the primary bonding after the etching process.
éthode de préparation d'un semi-conducteur comprenant le procédé de fabrication d'un substrat de silicium poreux et de formation subséquente d'une couche monocristalline de silicium non poreux sur le substrat de silicium poreux; le procédé de liaison primaire consistant à lier le substrat poreux de silicium et un substrat isolant au moyen de la couche monocristalline de silicium non poreux; le procédé d'attaque chimique du silicium poreux pour enlever le silicium poreux au moyen d'une attaque après le procédé de liaison primaire; et le procédé de liaison secondaire consistant à renforcer la liaison primaire après l'attaque chimique.
Sakaguchi Kiyofumi
Yonehara Takao
Canon Kabushiki Kaisha
Ridout & Maybee Llp
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