Method for producing a vertical channel transistor

H - Electricity – 01 – L

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356/177

H01L 21/461 (2006.01) H01L 21/28 (2006.01) H01L 21/306 (2006.01) H01L 29/78 (2006.01)

Patent

CA 1186811

SPECIFICATION TO ALL WHOM IT MAY CONCERN: BE IT KNOWN, that We, TIMOTHY WILLIAM JANES, resident of 83 Columbia Drive, Worcester, Worcestershire, England, and JOHN CHARLES WHITE, resident of 70 Tennyson Drive, Malvern, Worcestershire, England, have invented certain new and useful improvements in A METHOD FOR PRODUCING A VERTICAL CHANNEL TRANSISTOR and we do hereby declare the following to be a full, clear and exact description of the invention, such as will enable others skilled in the art to which it appertains, to make and use the same: ABSTRACT OF THE DISCLOSURE A steep-walled mesa is defined by ion beam, plasma or orientation dependent etch, and has a thick insulating layer over its uppermost surface. The material of the mesa is undercut to leave the insulating layer overhanging. Further insulating material is then formed thinly over the exposed mesa material and conductive material deposited giving good coverage of the insulated side-walls of the mesa. Excess conductive material is removed by ion-beam milling, leaving a conductive material gate in the shadow of the cap-like insulating layer. The orientation dependent etchant diazine catalysed ethylene diamine- pyrocatachol-water solution is used to form {111} crystal plane steep side-walled mesa from (110) surface oriented silicon, and aluminium metal conductive material deposited by chemical vapour deposition.

409434

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