Method for protecting netlists provided for simulation

H - Electricity – 03 – K

Patent

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Details

H03K 19/00 (2006.01) H03K 19/003 (2006.01)

Patent

CA 2130239

A design protection circuit for a logic circuit comprised of a counter for receiving clock pulses with the logic circuit and apparatus for resetting the logic circuit upon the counter counting a predetermined number of clock pulses, the predetermined number being higher than a highest number of clock pulses required by the logic circuit for carrying out a simulated logical function.

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