Method for the dynamic reconfiguration of a time-interleaved...

H - Electricity – 04 – J

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H04J 3/16 (2006.01) H04J 1/02 (2006.01) H04L 27/26 (2006.01) H04H 1/00 (2006.01)

Patent

CA 2208475

A method for the dynamic reconfiguration of a signal frame structure, wherein each frame is structured in at least one subchannel having a number, order and/or format capable of being altered under the control of a reallocation command, time interleaving on N frames being selectively performed for each subchannel. According to the method, in the transient state, and for the N frames following a reallocation command, the procedure for writing data elements according to the interleaving law remains unchanged, in accordance with the new structure defined by a reallocation command, and a specific logic for rereading the memory plane is implemented so that the frames consist of uniform capacity units comprising data elements from the same source signal. The corresponding transmitters, receivers and signals are also disclosed.

L'invention concerne un procédé de reconfiguration dynamique de la structure des trames d'un signal, chacune desdites trames étant structurées en au moins un sous-canal, le nombre, l'ordre et/ou le format desdits sous-canaux étant susceptible d'être modifié sous la commande d'une instruction de réallocation, et un entrelacement temporel sur N trames étant mis en oeuvre sélectivement pour chacun desdits sous-canaux, procédé dans lequel, en régime transitoire, pour les N trames suivant une instruction de réallocation: la procédure d'inscription desdits éléments de données en fonction de la loi d'entrelacement est inchangée, en respectant la nouvelle structure définie par une instruction de réallocation; et une logique spécifique de relecture du plan mémoire est mise en oeuvre, de façon que les trames soient constituées d'unités de capacité homogènes, formées d'éléments de données issus du même signal source. L'invention concerne également les émetteurs, les récepteurs et les signaux correspondants.

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