H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/30
H01L 29/78 (2006.01) H01L 21/8238 (2006.01) H01L 27/092 (2006.01) H01L 27/088 (2006.01)
Patent
CA 1223084
ABSTRACT OF THE DISCLOSURE A manufacturing method for VLSI MOS field effect transistor circuits having digital and analog functions performed by short channel transistors and analog transistors integrated on one chip. An n-tub manufacture is performed wherein as soft as possible a field progression in front of a drain-side pn-junction of the analog transistor is achieved. This occurs by means of an additional drain implantation (curve II) with drive-in diffusion before the actual source/drain implantation (curve I) of the n-channel transistors. Both the additional implantation as well as the source/drain implantation are carried out with phosphorous ions. The dosage of the additional implantation lies one to two orders of magnitude below the dosage of the actual implantation, and the penetration depth x in the additional drive-in diffusion is about twice as great as the penetration depth x of the actual source/drain regions. The method is applied in the manufacture of VLSI CMOS circuits.
467200
Schwabe Ulrich
Werner Christoph
Aktiengesellschaft Siemens
Fetherstonhaugh & Co.
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