Method of and circuit arrangement for freeing communications...

H - Electricity – 03 – K

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344/28

H03K 17/00 (2006.01) H04L 12/56 (2006.01)

Patent

CA 2037878

Abstract Method of and Circuit Arrangement for Managing Like Units, and Switch Element Prior Art: A buffer in, e.g., an ATM switch element re- ceives random data which is then called for by dif- ferent data sinks. After the data has been outputted to the data sinks, the memory locations of the buffer are released, i.e., labeled as free again. Technical Problem: A memory location which is not marked as free as a result of an error (whether erroneously the data is not called for or whether the release procedure is erroneous) remains blocked a Basic Idea: All memory locations whose contents have been in the buffer so long that they definitely (or at least very likely) should have been called for are babeledas free. Solution: Together with data, information on the time of entry is stored. All memory locations are checked at regular intervals for the age of their contents. Upon attainment of a predetermined age, the location is labeled as free. (Fig. 13)

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