Method of displaying a logic signal

Details Method of displaying a logic signal Method of displaying a logic signal

G - Physics

09

G

375/10, 375/33,

G09G 1/00 (2006.01) H03M 7/30 (2006.01)

Patent

CA 1200628

Abstract of the Disclosure A method of displaying logic signals on a raster scan type display device is disclosed. The logic signal is compressed as necessary by comparing the logic level of each bit with the logic level of a former bit, developing an output signal indicative of the logic level in accordance with the comparison, repeating the comparison "N" times, where N is a positive integer, and interrupting the comparison one time following the repeating step.

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