Method of forming an integrated circuit region through the...

H - Electricity – 01 – L

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H01L 21/265 (2006.01) H01L 21/033 (2006.01) H01L 21/223 (2006.01) H01L 21/266 (2006.01) H01L 21/324 (2006.01)

Patent

CA 1082373

A METHOD OF FORMING AN INTEGRATED CIRCUIT REGION THROUGH THE COMBINATION OF ION IMPLANTATION AND DIFFUSION STEPS Abstract A region in an integrated circuit substrate is formed by first ion implanting impurities of a selected conduct- ivity-determining type into a semiconductor substrate through at least one aperture in a masking electrically insulative layer, and then diffusing a conductivity- determining impurity of the same type through the same aperture into said substrate. The method has particular application when the elec- trically insulative layer is a composite of two layers, e.g., a top layer of silicon nitride and a bottom layer of silicon dioxide and the aperture is thus a pair of registered openings respectively through said silicon nitride and silicon dioxide layers, and the aperture through the silicon dioxide layer has greater lateral dimensions than that in the silicon nitride layer to pro- vide an undercut beneath the silicon nitride ion implanta- tion barrier layer.

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