Method of forming shallow trench isolation in silicon

H - Electricity – 01 – L

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H01L 21/762 (2006.01)

Patent

CA 2427300

A method of forming a shallow trench isolation region in a silicon wafer which results in the elimination of long range slip dislocations in the wafer and reduces leakage current across the isolation regions. Long shallow trenches (17) are formed in a silicon wafer (11) at a 45 degree angle to the (111) plane of the wafer. This is achieved by moving the primary flat of the wafer to the (100) plane prior to the formation of the trenches, which causes the bottom edges of the long trenches to intersect with several (111) planes, so that stresses do not propagate along any one single (111) plane. The trenches (17) are then filled with an insulative material, such as oxide.

L'invention concerne un procédé de formation d'une région d'isolation de tranchée peu profonde dans une tranche de silicium, qui entraîne l'élimination de dislocations par glissement à longue portée dans la tranche et réduit les courants de fuite traversant les régions d'isolation. De longues tranchées peu profondes (17) sont formées dans une tranche de silicium (11) à un angle de 45 degrés par rapport au plan (111) de la tranche. Cette opération s'effectue en déplaçant le premier plat de la tranche vers le plan (100) avant déformation des tranchées, ce qui entraîne les bords inférieurs des longues tranchées à croiser différents plans (111), de façon que les contraintes ne se propagent pas le long d'un plan unique (111). Les tranchées (17) sont ensuite comblées par une matière isolante, telle que l'oxyde.

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