Method of forming vias in silicon carbide and resulting...

H - Electricity – 01 – L

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H01L 21/04 (2006.01) H01L 21/768 (2006.01) H01L 23/522 (2006.01)

Patent

CA 2406054

A method of fabricating an integrated circuit on a silicon carbide substrate is disclosed that eliminates wire bonding that can otherwise cause undesired inductance. The method includes fabricating a semiconductor device on a first surface of a silicon carbide substrate and with at least one metal contact for the device on the first surface of the substrate. The opposite, second surface of the substrate is then ground and polished until it is substantially transparent. The method then includes masking the polished second surface of the silicon carbide substrate to define a predetermined location for a via that is opposite the device metal contact on the first surface; etching the desired via through the desired masked location until the etch reaches the metal contact on the first surface; and metallizing the via to provide an electrical contact from the second surface of the substrate to the metal contact and to the device on the first surface of the substrate.

L'invention concerne un procédé de fabrication de circuit intégré dans un substrat de carbure de silicium éliminant le microcâblage qui peut engendrer une inductance parasite. On fabrique un dispositif à semiconducteur sur une première surface de substrat au carbure de silicium, avec au moins un contact métallique pour le dispositif sur la première surface. La seconde surface opposée est ensuite meulée et polie jusqu'à devenir sensiblement transparente. Ensuite, on masque cette surface pour définir un emplacement préétabli de traversée à l'opposé du contact métallique sur la première surface, on attaque la traversée à travers l'emplacement masqué jusqu'au contact métallique susmentionné, et on métallise ladite traversée pour assurer un contact électrique entre la seconde surface et le contact métallique, d'une part, et le dispositif sur la première surface, d'autre part.

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