H - Electricity – 04 – J
Patent
H - Electricity
04
J
363/17
H04J 3/06 (2006.01)
Patent
CA 1157975
PHN 9429 10 ABSTRACT: The invention relates to a method of frame synchronisation of a digital time-division multiplex communication system and to an arrangement for performing the method. During the search for a syn- chronisation pattern of M bits in frames, each consisting of N time slots, a shift register of N x M bits is usually used. The method according to the invention has for its object to reduce the number of bit storage capacity required The method operates as follows. At the start of the synchronisation process the first bit of the syn- chronisation pattern is expected. If this expectation comes true, the second bit of the synchronisation pattern is expected in that time slot in the immediately subsequent frame etc. If the expectation does not come true then the (partially) received pattern is no synchronis- ation pattern and the procedure is performed again in that time slot. The method is based on the recognition that is is not necessary to store the partially received synchronisation pattern in a store, but that it is sufficient to store the numerical order of the bit of the synchronisation pattern expected in the time slot of the next frame. Consequently, a storage capacity of N x 2 log M is sufficient. The method can be performed with a microprocessor or with "wired" logic circuits
350076
Koninklijke Philips Electronics N.v.
Van Steinburg C.e.
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