G - Physics – 06 – K
Patent
G - Physics
06
K
324/58.1
G06K 5/00 (2006.01) G01R 31/28 (2006.01) G01R 31/317 (2006.01) G01R 31/3185 (2006.01) G06F 1/10 (2006.01) G06F 7/00 (2006.01) G06F 7/57 (2006.01) G11C 19/00 (2006.01) H03K 3/037 (2006.01) H03K 19/08 (2006.01) H03K 19/20 (2006.01)
Patent
CA 1077567
METHOD OF LEVEL SENSITIVE TESTING A FUNCTIONAL LOGIC SYSTEM WITH EMBEDDED ARRAY Abstract Level sensitive testing is performed on a generalized and modular logic with embedded array system that is uti- lized as an arithmetic /logical unit in a digital computer. Each arithmetic/logical unit of a computer is formed of arrangements of combinational logic networks, arrays and storage circuitry. The storage circuitry has the capability for performing scan-in/scan-out operations independently of the system input/output and controls. Using the scan capa- bility, the method of the invention provides for the state of the storage circuitry to be preconditioned and indepen- dent of its prior history. Test patterns from an automa- tic test generator are cycled through the networks of com- binational logic and arrays and their respective associated storage circuitry for removal through the scan arrangement to determine their fault status. The above ABSTRACT is not to be taken either as a com- plete exposition or as a limitation of the present invention, the full nature and extent of the invention being discern- ible only by reference to and from the entire disclosure.
280450
Eichelberger Edward B.
Muehldorf Eugen I.
Walther Ronald G.
Williams Thomas W.
Eichelberger Edward B.
International Business Machines Corporation
Muehldorf Eugen I.
Walther Ronald G.
Williams Thomas W.
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