Method of making fet

H - Electricity – 01 – L

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356/126, 356/148

H01L 21/302 (2006.01) H01L 21/033 (2006.01) H01L 21/337 (2006.01) H01L 29/80 (2006.01) H01L 29/808 (2006.01)

Patent

CA 1136290

ABSTRACT A method of making a junction gate field effect transistor with a very short gate length and good high frequency, low noise characteristics, the method comprising the steps of: forming on a silicon epitaxial layer of n-type conductiv- it-j a doped oxide film containing boron as an impurity to give p-type conductivity, forming a mask containing Si3N4 film and having a width larger than that of a gate region to be formed on said n-type epi- taxial layer, etching said doped oxide film by utilizing said mask as an etching mask to expose the surface of said silicon crystal layer such that sides of the part of said doped oxide film covered by said mask are side-etched by a predetermined width, ion-implanting an impurity of said first conductivity type into said n-type epitaxial layer by utilizing said mask as im- planting mask, and carrying out a heat treating, thereby diffusing said second conductivity type impurity from said doped oxide film re- tained only under said mask into said n-type epitaxial layer to form said gate region and driving said ion-implanted first conduc- tivity type impurity into said silicon crystal layer to form a source region and a drain region.

352036

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