H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/128
H01L 21/302 (2006.01) H01L 21/033 (2006.01) H01L 21/32 (2006.01) H01L 21/321 (2006.01) H01L 21/336 (2006.01) H01L 29/76 (2006.01)
Patent
CA 1067210
METHOD OF MAKING MOS DEVICE ABSTRACT The invention relates to a method of making MOS semiconductor devices. A single crystal silicon substrate has the following layers formed thereon according to a pre- determined pattern: firstly there is an oxide film next to the silicon substrate, secondly a high-temperature-resistive film (such as a metal or polycrystalline silicon) overlies the oxide film and thirdly an oxidation preventing film overlies the high-temperature-resistive film. The high-temperature- resistive film is eventually to become a gate electrode and should resist melting during the step of diffusing an impurity into the substrate at exposed parts thereof to form source and drain regions. After the diffusion step the device is subjected to thermal oxidation so that the exposed side-end parts of the high-temperature- resistive film and the exposed parts of the substrate are oxidized. Further steps are then carried out in the preparation of the device. By this method the usual overhang of the edges of the high-temperature-resistive layer is avoided thereby improving the drain-breakdown voltage, lowering the gate leakage current and reducing the possibility of open circuit conditions in vapor-deposited metal wiring films.
270677
Okazaki Hiroshi
Okumura Tomisaburo
Tsuchitani Akira
Ueda Seiji
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