Method of making planarized josephson junction devices

Details Method of making planarized josephson junction devices Method of making planarized josephson junction devices

G - Physics

11

C

352/49

G11C 11/44 (2006.01) H01L 39/24 (2006.01)

Patent

CA 1190648

ABSTRACT OF THE DISCLOSURE The present invention teaches a method of planarizing built-up vacuum deposited surfaces or areas on Josephson junction and semiconductor devices so that successively deposited layers do not replicate the undulations of previous layers. After a surface layer is deposited in a vacuum system and part of the surface is etched, a raised surface is generated. A photoresist lift-off stencil is applied to the surface to be preserved and the material to be removed is removed by isotropically etching so as to leave an overhang or ledge of photoresist material over the area of the material retained. A new layer of material is now deposited by vacuum deposition so as to almost fil the area to be planarized. A small gap remains between the top of the new material being vacuum de- posited and the bottom of the photoresist stencil so that solvent can be introduced to the stencil. When the photoresist stencil is removed, the top of surface being preserved is substantially planar with the new layer of material.

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