Method of making silicone integrated circuits

Details Method of making silicone integrated circuits Method of making silicone integrated circuits

H - Electricity

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L

356/176

H01L 21/316 (2006.01) H01L 21/033 (2006.01) H01L 21/28 (2006.01) H01L 21/762 (2006.01) H01L 21/86 (2006.01)

Patent

CA 1100236

ABSTRACT OF THE DISCLOSURE An enhancement type, self-aligned silicon gate complementary metal oxide semiconductor (CMOS)/silicon on sapphire (SOS) structure is made by generating all gate oxides and oxide isolated regions with dry oxygen at pressures above 1 atmosphere and at temperatures of 800°C to 825°C using ion implantation for all doping operations and plasma definition of all masking dielectrics.

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