Method of manufacturing a high resistance layer having a low...

Details Method of manufacturing a high resistance layer having a low... Method of manufacturing a high resistance layer having a low...

H - Electricity

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H01L 21/62 (2006.01) H01L 21/02 (2006.01)

Patent

CA 1210525

PHA. 21.154 8 ABSTRACT: A method of manufacturing a semiconductor device having a resistive layer with a low temperature coefficient of resistance. The method comprises the steps of providing a semi-insulating film (6) comprising silicon crystallites embedded in a silicon dioxide matrix, preferably made by chemical vapor decomposition of a mixture of silane (SiH4) and nitrous oxide (N2O). The film is at least partly con- verted into a resistive layer (2) by implanting ions of arsenic or phosphorus in the film. The film is heated at about 900°C and provided with electrode regions (3,4).

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