Method of manufacturing a semiconductor device

H - Electricity – 05 – K

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H05K 3/06 (2006.01) H01L 21/033 (2006.01) H01L 21/311 (2006.01) H01L 21/314 (2006.01) H01L 21/32 (2006.01) H01L 21/762 (2006.01) H01L 21/8222 (2006.01) H01L 21/8248 (2006.01)

Patent

CA 1094429

PHF 76572 14.6.77 ABSTRACT A method for the self-aligned manufacture of a semiconductor device having island insulation obtain- ed by thermal oxidation. Provided successively on the semiconductor surface are an insulating layer of pre- ferably silicon oxide, a layer of silicon nitride, and a layer of preferably aluminium oxide. In the last-mentioned layer a basic mask is formed having apertures at the area of all the semiconductor zones to be formed and of the island insulation zones, From this mask the various processes are carried out via a replica mask obtained in the nitride layer, - 37 -

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