H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/177
H01L 21/28 (2006.01) H01L 21/033 (2006.01) H01L 21/308 (2006.01) H01L 21/31 (2006.01) H01L 21/321 (2006.01) H01L 21/339 (2006.01)
Patent
CA 1216969
13 ABSTRACT: Method of manufacturing a semiconductor device and semiconductor device manufactured by means of the method. A method of manufacturing a semiconductor device having a narrow groove or slot. There are formed on a substrate (4) a heavily n-doped first silicon layer (1), on this layer an oxidation- preventing layer (3) of preferably silicon nitride and on this layer a weakly doped or undoped second silicon layer (2). By means of a first and single masking step, a part of layer (2) is is removed. The remaining part is oxidized in part. The exposed layer (3) is re- moved without masking. Subsequently, the oxide on layer (2) is re- moved. By thermal. oxidation, a thin oxide layer (6) is formed on layer (2) and an about ten times thicker oxide layer (7) is formed on the layer (1). After the exposed layer (3) has been etched away selectively, the oxide on layer (2) is etched away entirely and the oxide on layer (1) is etched away only superfically by dip-etching, after which the groove (8) is etched while removing simultaneously the remaining part of layer (2). Figure 7.
458637
Appels Johannes A.
Maas Henricus G.r.
N.v.philips'gloeilampenfabrieken
Van Steinburg C.e.
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