Method of manufacturing a semiconductor device utilizing...

Details Method of manufacturing a semiconductor device utilizing... Method of manufacturing a semiconductor device utilizing...

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H01L 21/22 (2006.01) H01L 21/00 (2006.01) H01L 21/225 (2006.01) H01L 21/8238 (2006.01) H01L 23/29 (2006.01) H01L 23/485 (2006.01)

Patent

CA 1086868

ABSTRACT: A method of manufacturing a semiconductor device, in particular a device having two complementary insulated gate field effect transistors, in which an aperture is pro- vided in a masking layer and in said aperture a zone is diffused in the body from a highly doped layer, in particular a phosphorus glass layer. According to the invention, a thermal oxide layer is formed in the aperture in a first heating step during the diffusion, after which the doping layer is removed without using a mask and while maintaining the thermal oxide layer and the dopant is then further diffused in a second heating step. The thermal oxide layer serves as a partial masking against the diffusion, as an etchant stopper and in many cases also as a mask against ion implantation. - 20 -

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