H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/130
H01L 21/20 (2006.01) H01L 21/8252 (2006.01) H01L 27/144 (2006.01) H01L 31/105 (2006.01) H01L 27/06 (2006.01)
Patent
CA 2014399
ABSTRACT There is disclosed a method of manufacturing an integrated circuit, comprising: the first step of growing a first epitaxial crystal on a compound semiconductor substrate, removing an unnecessary region of the first epitaxial crystal to form a residual portion, and covering the residual portion with a selective growth mask, the second step of growing a second epitaxial crystal on an exposed substrate portion, removing an unnecessary portion of the second epitaxial crystal to form a residual portion of the second epitaxial crystal, and covering the residual portion of the second epitaxial crystal with a selective growth mask, and the third step of growing a third epitaxial crystal on an exposed substrate portion and removing an unnecessary region of the third epitaxial crystal, wherein the first to third epitaxial crystal form any one of a pin photodiode crystal, a heterojunction bipolar transistor crystal, and a high electron mobility transistor crystal, and are different from each other.
Marks & Clerk
Sasaki Goro
Sumitomo Electric Industries Ltd.
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