H - Electricity – 01 – L
Patent
H - Electricity
01
L
26/112
H01L 25/00 (2006.01) C23C 14/56 (2006.01) H01L 21/203 (2006.01) H01L 21/316 (2006.01) H01L 21/318 (2006.01) H01L 21/3205 (2006.01) H01L 21/336 (2006.01)
Patent
CA 1184020
- 1 - Abstract: The present invention relates to a method of manufact- uring a semiconductor device comprising at least the step of evacuating a vacuum vessel to a vacuum of at most 10-9 Torr. The vacuum vessel includes at least first and second evaporation sources and a substrate to-be-evaporated. The method includes the step of forming a first evaporation layer on the substrate to-be-evaporated by the use of the first evaporation source. A second evaporation layer is formed on at least the first evaporation layer by the use of the second evaporation source. A predetermined number of evaporation layers are further formed on at least the second evaporation layer by repeating similar steps as is needed. At least one of the evaporation sources is a semiconductor material while at least another is an insulator material. The respective steps of forming the evaporation layers are performed without taking the resultant substrate out of the vacuum vessel.
394515
Kobayashi Keisuke L.i.
Matsui Makoto
Murayama Yoshimasa
Shiraki Yasuhiro
Hitachi Ltd.
Kirby Eades Gale Baker
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