Method of processing multi-level signals for simple clock...

Details Method of processing multi-level signals for simple clock... Method of processing multi-level signals for simple clock...

H - Electricity

04

L

H04L 7/033 (2006.01) H01P 1/18 (2006.01) H03H 11/04 (2006.01)

Patent

CA 2185866

A method and a circuit for simple clock recovery from multi-level at high transmission rates. The circuit is compatible with standard PLL- type clock recovery techniques for NRZ and generalized two-level signalling. The timing information is extracted from a single threshold crossing, irrespective of the number of levels (M) of the signal. This was verified to provide sufficient spectral information for the proper operation of a clock recovery PLL. The threshold may be programmed for various line codes.

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