Method of producing mos transistors

Details Method of producing mos transistors Method of producing mos transistors

H - Electricity

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H01L 21/02 (2006.01) H01L 21/225 (2006.01) H01L 21/285 (2006.01) H01L 21/768 (2006.01) H01L 21/8238 (2006.01) H01L 23/485 (2006.01)

Patent

CA 1207469

ABSTRACT OF THE DISCLOSURE The invention relates to a method for producing MOS transistors with flat source/drain zones, short channel lengths, and a self aligned contacting plane comprised of a metal silicide. In this method, the source/drain zones in the semiconductor substrate are produced by out-diffusion of the contacting plane consisting of a doped metal silicide and deposited directly on the substrate. The method serves to produce NMOS, PMOS, and in particular CMOS circuits in VLSI technology and permits a very high packing density and an independent additional wiring plane of very low resistance.

446965

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