H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/162
H01L 21/31 (2006.01) G03F 7/11 (2006.01) H01G 13/00 (2006.01) H01L 21/033 (2006.01) H01L 21/308 (2006.01) H01L 21/339 (2006.01)
Patent
CA 1203323
PHN 10211 27 28.8.1982 ABSTRACT: Method of providing a narrow groove or slot in a substrate region, in particular a semiconductor substrate region. According to the invention, at least one oxidation-preventing layer (2) is provided on the substrate region (1), whilst on this layer there is provided an oxidizable layer (3). The oxidizable layer (3) is removed above part of the substrate region (1). An edge portion (5) of the oxidizable layer (3) is oxidized. Subsequently, at least the uncovered part of the oxidation-preventing layer (2) is removed selectively and the exposed part of the substrate region is thermally oxidized through part of its thickness, while practically only at the area of the oxidi- zed edge portion (5) the substrate region (1) is exposed and is etched away through at least part of its thickness in order to form a groove (8), the oxidizable layer (3) and the oxidized edge portion (5) being removed completely. The substrate region may be a mono- or polycrystalline silicon layer. The oxidizable layer may consist of for instance poly- crystalline silicon and may be coated with a second oxida- tion-preventing layer (4). If the substrate region is a masking layer, the slots provided therein may be used for doping purposes, for example, for forming channel stoppers, etc, Application in particular for the manufacture of integrated circuits and of gate electrodes spaced apart by very small distances in IGFET and CCD structures. Figure 9 is suitable for abridgment.
417321
Appels Johannes A.
Maas Henricus G.r.
N.v. Philips Gloeilampenfabrieken
Van Steinburg C.e.
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