Method of schematic-level ams topology optimization using...

Details Method of schematic-level ams topology optimization using... Method of schematic-level ams topology optimization using...

G - Physics

06

F

G06F 17/50 (2006.01) H05K 1/00 (2006.01) H05K 3/00 (2006.01)

Patent

CA 2415810

A method of designing AMS circuits comprises representing circuit design candidates using direct representations such as hyper graphs and storing the direct representations in a database. An optimizer operates on the database of circuit design candidates using an application programming interface to identify optimal circuit design candidates. Views of the circuits, such as schematic or layout views, are provided to a designer. An interface such as a graphical user interface, allows the designer to manipulate the circuit design candidates with corresponding updates to the database during the optimization process so that further optimization steps are based on the updated direct representations in the database that result from the designer's manipulations of the displayed circuit design candidates.

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