Method, system and computer program for automated hardware...

Details Method, system and computer program for automated hardware... Method, system and computer program for automated hardware...

G - Physics

06

F

G06F 11/00 (2006.01) G06F 17/50 (2006.01)

Patent

CA 2567218

The present invention provides a method, system and computer program for automated debugging for pre-fabricated digital synchronous hardware designs implemented in Hardware Description Language (HDL). Required information is captured by interacting with the verification environment after verification fails. This capture information is used to build a diagnosis problem where the solution is a set of logic level error sources. Using the HDL information, the error at the logic level is translated to gates, modules, statements, and signals in the HDL description. The diagnosis problem can be solved efficiently formulating a Quantified Boolean Formula (QBF) problem and also by using the hierarchical and modular nature of the HDL design during diagnosis.

Affiliated with

Also associated with

Rating

Method, system and computer program for automated hardware... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method, system and computer program for automated hardware..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method, system and computer program for automated hardware... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1685108