H - Electricity – 01 – L
Patent
H - Electricity
01
L
H01L 33/00 (2006.01) H01S 5/00 (2006.01)
Patent
CA 2500647
A method of forming a semiconductor device may include forming a semiconductor layer on a substrate, and forming a contact layer on the semiconductor layer opposite the substrate. After forming the semiconductor layer and the contact layer, the contact layer and the semiconductor layer may be patterned such that the semiconductor layer includes a mesa having a mesa surface opposite the substrate and mesa sidewalls between the mesa surface and the substrate and so that the patterned contact layer is on the mesa surface. Related structures and devices are also discussed.
L'invention concerne un procédé relatif à la formation de dispositif à semiconducteur pouvant consister à former une couche à semiconducteur sur un substrat, et à former une couche de contact sur la couche à semiconducteur, opposée au substrat. Après la formation de la couche à semiconducteur et de la couche de contact, on peut établir des motifs sur ces deux couches, de sorte que la couche à semiconducteur comprenne une structure mesa à surface mesa opposée au substrat et des parois mesa entre la surface mesa et le substrat, et de sorte que la couche de contact comportant les motifs se trouve sur la surface mesa. L'invention concerne également des structures et des dispositifs connexes.
Haberern Kevin W.
Sheppard Scott T.
Sherrick Sheila
Cree Inc.
Haberern Kevin W.
Sheppard Scott T.
Sherrick Sheila
Sim & Mcburney
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