G - Physics – 06 – F
Patent
G - Physics
06
F
354/233
G06F 13/28 (2006.01)
Patent
CA 1221173
MICROCOMPUTER SYSTEM WITH BUS CONTROL MEANS FOR PERIPHERAL PROCESSING DEVICES Abstract A microcomputer system includes a main processor, a memory and a direct memory access controller (DMA) effective to control direct data transfer between the memory and input/output devices on channels. Bus control for data transfer is switch- able between the DMA and processor by a hold request/acknowledge handshaking sequence between the DMA and processor. A control line from the channels is activated by a peripheral processing device on a channel when it wishes to gain control of the busses for data transfer. Logic means coact with the handshaking sequence to determine which device gains control of the busses. This logic is responsive to the DMA address enable output (AEN), the hold acknowledge output of the main processor (HLDA) and the channel control line output (-MASTER). When all these are deactivated, control passes to the main processor, when AEN and HLDA only are activated, control passes to the DMA controller and, when all three are activated, control passes to the peripheral processing device.
473966
Dean Mark E.
Moeller Dennis L.
Barrett B.p.
International Business Machines Corporation
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