Microprocessor circuit organisation system and sequencing...

G - Physics – 06 – F

Patent

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G06F 9/38 (2006.01)

Patent

CA 2228703

A microprocessor circuit organisation system and sequencing method is disclosed. Instruction registers (IR¿2? to IR¿m?) are connected in line and an inhibiting device (B¿2?, ..., B¿n-1?, B¿n?, B¿n+1?, ..., B¿m?) is connected to each of the instruction registers (IR¿2? to IR¿m?). Each inhibiting device has inputs connected to the inputs of the respective register and to the clock circuit (8) and outputs a respective instruction register loading signal on detecting a predetermined combination of numbers in the respective register.

L'invention concerne les microprocesseurs et, plus particulièrement, un système d'organisation et un procédé de séquencement des circuits d'un microprocesseur. L'invention réside dans le fait que les registres d'instruction (IR2 à IRm) sont connectés en chaîne et qu'un dispositif d'inhibition (B2, ...., Bn-1, Bn, Bn+1, ..., Bm) est associé à chaque registre d'instruction (IR2 à IRm). Chaque dispositif d'inhibition a ses entrées qui sont connectées aux entrées du registre associé et au circuit horloge (8) et fournit un signal de chargement du registre d'instruction associé lorqu'il détecte une combinaison de chiffres prédéterminée dans le registre associé.

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