Microprogrammed system having single microstep apparatus

G - Physics – 06 – F

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354/225, 354/230

G06F 11/00 (2006.01) G06F 11/36 (2006.01) G11C 11/406 (2006.01)

Patent

CA 1138116

ABSTRACT OF THE DISCLOSURE In a data processing system which includes a central processing unit and one or more main memory units comprised of semiconductor dynamic random access memory chips, logic is provided within the system to provide for the single stepping of the central processing unit clock thereby allowing for the execution of one CPU cycle. The system logic is organized such that the memory refresh command signals, which are normally generated by the CPU, are generated by the single step logic thereby maintaining the contents of the main memory modules. The logic of the overall data processing system is organized such that most transfers of information between the main memory, the CPU and I/O controllers, to which peripheral devices are con- nected, may take place in the single step mode of operation without the loss of information.

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