Mis transistor voltage regulator

Details Mis transistor voltage regulator Mis transistor voltage regulator

G - Physics

05

F

323/4

G05F 1/08 (2006.01)

Patent

CA 1045201

MIS TRANSISTOR VOLTAGE REGULATOR Abstract of the Disclosure The drain electrode of a depletion type MIS transistor is connected directly to an input terminal while the source elec- trode of an enhancement type MIS transistor is connected directly to a reference terminal. The source and gate electrodes of the depletion type MIS transistor and the drain and gate electrodes of the enhancement type MIS transistor are connected together directly to an output terminal. When an unregulated input volt- age applied between the input terminal and the reference terminal is sufficient to saturate both of the MIS transistors, a regulated output voltage is developed between the output terminal and the reference terminal.

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